|
What is the Pin Layout of the JTAG Download Cable for the
E5 Development Board?
The Triscend JTAG Download Cable connects a PC running
FastChip to a target board with the proper target board header and a
Triscend E5 Configurable System-on-Chip (CSoC) device. One end of the JTAG
Cable connects to a standard DB-25 parallel port connector. The other
connects to the target board header on the target board. You can use
a standard PC parallel port cable to connect the JTAG pod to your computer’s
parallel port.
|
|
The JTAG Download Cable pod, also known as the
Macgraigor Wiggler, contains active driver components. The parallel port
cable does not electrically connect directly to the E5’s JTAG pins.
|
Parallel Port Connector
The diagram below shows the pinout for the DB-25 parallel
port connector on the JTAG Download Cable. Only the four JTAG signals need
to be connected. The active-Low RST signal should not be connected to the
JTAG Download Cable. All ground lines, pins 18 through 25, should be
connected.
|
DB-25
Pin
|
Signal Name
|
Direction
|
E5
Function
|
|
1
|
nStrobe
|
In/Out
|
-
|
|
2
|
Data 0
|
Out
|
DO NOT CONNECT
|
|
3
|
Data 1
|
Out
|
TMS
|
|
4
|
Data 2
|
Out
|
TCK
|
|
5
|
Data 3
|
Out
|
TDI
|
|
6
|
Data 4
|
Out
|
-
|
|
7
|
Data 5
|
Out
|
-
|
|
8
|
Data 6
|
Out
|
-
|
|
9
|
Data 7
|
Out
|
-
|
|
10
|
nAck
|
In
|
-
|
|
11
|
Busy
|
In
|
TDO
|
|
12
|
Paper-Out/
Paper-End
|
In
|
-
|
|
13
|
Select
|
In
|
-
|
|
14
|
NAuto-Linefeed
|
In/Out
|
-
|
|
15
|
NError/
nFault
|
In
|
-
|
|
16
|
nInitialize
|
In/Out
|
-
|
|
17
|
nSelect-Printer/
nSelect -In
|
In/Out
|
-
|
|
18-25
|
Ground
|
Ground
|
Ground
|
Target Board Header
The diagram below shows the stake-pin header as it appears
on the target board. This is equivalent to header JP13 on the Triscend
Development Board. The +3.3 volt DC output is a power-on indicator
only. Some versions of the JTAG Download Cable obtain their power from
pins 19 and 20. Others use the PC's power and do not connect to pins 19
and 20.
|
|
The E5 does not have and does not
need a JTAG reset pin. Sending it the appropriate command over the four
JTAG inputs resets the JTAG controller within the E5.
Do not connect the System Reset input. There
have been reports of sporadic resets caused by the host PC. If System
Reset is not connected, then the sporadic reset problem is eliminated.
|
|
Header Pin
|
Signal
Name
|
Direction
|
|
1
|
TDO
|
Output
|
|
2
|
No Connect
|
N/A
|
|
3
|
TDI
|
Input
|
|
4
|
No Connect
|
N/A
|
|
5
|
No Connect
|
N/A
|
|
6
|
+3.3 VDC Out
|
Output
|
|
7
|
TCK
|
Input
|
|
8
|
No Connect
|
N/A
|
|
9
|
TMS
|
Input
|
|
10
|
No Connect
|
N/A
|
|
11
|
System Reset
|
Input (open collector)
DO NOT CONNECT
|
|
12
|
GND
|
Ground
|
|
13
|
No Connect
|
N/A
|
|
14
|
No Connect
|
N/A
|
|
15
|
No Connect
|
N/A
|
|
16
|
GND
|
Ground
|
|
17
|
No Connect
|
N/A
|
|
18
|
No Connect
|
N/A
|
|
19
|
+5 VDC Out
|
Output
|
|
20
|
GND
|
Ground
|
N/A = Not applicable.
 ®
©
2001 by Triscend Corporation. All
rights reserved.
|